Elijah's Notes

verilog

2 items with this tag.

  • May 17, 2025

    Static Timing Analysis

    • timing-analysis
    • verilog
    • systemverilog
    • setup-time
    • hold-time
  • Feb 25, 2024

    Developing FPGA Designs with Quartus and ModelSim

    • quartus
    • modelsim
    • verilog
    • testing-process
    • modular-design

Created with Quartz v5.0.0 © 2026

  • GitHub